In conventional active matrix liquid crystal display devices, respectively independent pixels are arranged in a matrix shape in a liquid crystal display panel, and a pixel electrode and a switching element are respectively provided in each of the pixels.
In the above described liquid crystal display devices, a driving voltage is applied to the pixel electrode through the switching element, and liquid crystal is driven by means of a difference in potential between the pixel electrode and a common electrode that is arranged opposite the pixel electrode through the liquid crystal. Further, an image is displayed on a liquid crystal display panel by optically modulating transmitted light or reflected light.
In the above described liquid crystal display devices, a thin film transistor (TFT) is mainly used as a switching element. A liquid crystal display panel that uses TFTs includes an active matrix substrate (hereunder, an “active matrix substrate” is also referred to as an “array substrate”) on which TFTs are formed, and in view of the quality and cost thereof, active matrix substrates are currently used most widely in the above described liquid crystal display devices.
As shown in FIG. 10, in a conventional array substrate 101, normally, source wiring 102 and gate wiring 103 are arranged vertically and horizontally. Further, an interlayer insulation layer is formed between pixel electrodes 104, and the gate wiring 103 and source wiring 102. An input terminal 105 is connected to the source wiring 102. The gate wiring 103 is connected to power supply voltage supplying terminals 108 and 109 through a logic circuit 107.
In this connection, a switching element such as a TFT is generally weak against a strong electric field. Therefore, destruction of a TFT or a defect in the properties of a TFT or the like may be caused by a surge current that results from the build-up and discharge of static electricity or the like in a TFT manufacturing process, a process of rubbing an alignment layer, a process of mounting an external component and the like. Specifically, static electricity builds up over a long period in a semiconductor layer inside a TFT, and the threshold value of the TFT may be shifted due to the semiconductor layer being exposed in a high voltage state. A pixel that is affected in this manner is recognized as a defective pixel. Further, if a voltage that exceeds an allowable withstand voltage by a large margin is applied to the source wiring 102 and/or the gate wiring 103, a surge current may be generated to a degree that causes dielectric breakdown of an insulation layer and/or a semiconductor film, which may result in a display failure caused by a leak and/or a property defect.
To avoid such a situation, generally, during a process of manufacturing an array substrate, all input terminals are short-circuited with a conductive film pattern referred to as a “short ring” 150, and care is taken so that a state in which elements or wiring are exposed to a high voltage does not continue for a long time. However, if the short ring 150 is formed using a transparent conductive film that is the same as the pixel electrode 104, inspection of the array substrate can not be carried out after patterning of the transparent conductive film, and inspection and correction of a defect relating to the transparent conductive film can not be performed. Therefore, in the conventional active matrix liquid crystal display devices, there is room for improvement with respect to further enhancing the display quality and yield. Note that, the short ring 150 is ultimately removed by splitting up the array substrate to divide the array substrate into respective display devices (panels).
It is conceivable to utilize the following technology to protect a switching element from a surge current without using the short ring 150.
For example, an RLC circuit has been disclosed (for example, see Patent Document 1) that includes a semiconductor substrate in which a monolayer of an n region or a p region is formed on a surface side, a non-spiral-shaped first electrode that is formed on the semiconductor substrate, a non-spiral-shaped second electrode that is formed so as to be approximately coplanar with and parallelly adjacent to the first electrode, and an insulating layer that is formed between at least one of the first and second electrodes and the semiconductor substrate, wherein inductors formed by the first electrode and the second electrode, respectively, and a capacitor formed between the inductors are present in a distributed constant manner, and at least one of the first electrode and the second electrode is used as a signal input/output route.
Further, an input/output protection circuit of a liquid crystal display device has been disclosed (for example, see Patent Document 2) in which switching elements used for driving respective pixels are constituted by N-type thin film transistors (N-type LDD structure TFTs) that have a lightly doped drain structure (LDD structure), which includes: a first input/output protection transistor that does not have the LDD structure and is constituted by an N-type thin film transistor (N-type non-LDD structure TFT) that has a breakdown voltage and a hold voltage that are lower than the N-type LDD structure TFT; a second input/output protection transistor that is constituted by a P-type thin film transistor (P-type non-LDD structure TFT) that does not have the LDD structure and has a breakdown voltage and a hold voltage that are lower than the N-type LDD structure TFT, and that is complimentarily connected to the first input/output protection transistor; and a resistance element for by-passing an overcurrent, that is formed between the respective source electrodes of the first and second input/output protection transistors and an external electrode of the liquid crystal display device.
Furthermore, an electrostatic protection circuit has been disclosed (for example, see Patent Document 3) that includes: a first MOS transistor in which a first drain is connected to an input terminal of the circuit to be protected, and a first gate and a first source are connected to a grounding terminal; and a second MOS transistor in which a second gate is connected to a grounding terminal, a second source is connected to the input terminal, and a second drain is connected to a power source terminal of the circuit to be protected through an impedance including a resistance and an inductance.